The converter topology considered is distributed in nature, where each phase module consists of five series connected and stacked submodules. Each submodule comprises of a dual active bridge (DAB) and an inverter. To manage this distributed architecture, a robust communication framework is necessary. This framework connects the central controller, which oversees the entire system, with the local controllers that manage each individual submodule.

The control architecture consists of a central controller and multiple local controllers. Each local controller manages its corresponding submodule, where the Dual Active Bridge (DAB) controller performs Maximum Power Point Tracking (MPPT). The local controllers continuously measure the output DC-link voltage of their respective DABs and communicate this information to the central controller. The central controller is responsible for grid synchronization, maintaining the average DC-link voltage of each phase, reactive power control, coordinating the operation of all submodules and generation of module reference signals, and initiating protective actions under fault conditions.

Both the central and local controllers are implemented using the TMS320F28379D microcontroller from Texas Instruments. High-speed communication between the central and local controllers is achieved using the Serial Peripheral Interface (SPI) protocol implemented over a fibre-optic physical medium. This synchronous, full-duplex configuration provides high-throughput bidirectional data transfer between the central controller and local submodules. This ensures precise timing for control loops. Furthermore, the fibre-optic link provides critical galvanic isolation and absolute immunity to the high-voltage electromagnetic interference (EMI) inherent in the converter structure.

To govern data exchange, custom communication firmware is being developed on top of the microcontroller's native SPI driver. This specialized firmware manages all interactions between the central and local controllers by implementing a custom data frame format. Additional redundancy mechanisms to guarantee reliable and fault-tolerant communication across the system architecture will also be developed. This work was done by NCPRE students, Navaneeth and Sagnik, under the guidance of Prof. Sandeep Anand.