Advancements in wide-band-gap materials like silicon carbide (SiC) have enabled medium-voltage (MV) power devices to handle blocking voltages of 3.3–15 kV. However, their high operating voltages and fast switching transitions expose them to peak voltage stress and rapid dv/dt rates of 50–100 V/ns. These conditions demand gate drivers with high isolation voltage, strong dv/dt immunity, and low parasitic coupling capacitance. As the technology is still emerging, suitable commercial gate drivers are limited. The gate driver circuit is structured around two main stages: signal transmission and power transmission. For the signal transmission stage, optical fiber technology was selected due to its superior transmission speed and high insulation voltage capability. Broadcom’s AFBR series optical fibers were used to meet these requirements, offering reliable high-speed communication with high electrical isolation. In the power transmission stage, the design emphasized the need for high isolation and low coupling capacitance to minimize common-mode current. To achieve this, the gate driver architecture uses isolated DC/DC converters and isolated gate driver ICs to maintain electrical isolation between the signal ground and the drive ground. This configuration directs the majority of the common-mode current through the low-impedance drive ground path, effectively bypassing the signal grounds and thereby protecting the control signals from common-mode noise. The PCB layout followed IPC-2221 standards to satisfy the required creepage and clearance distances for the required isolation. Initial testing focused on verifying the communication between the gate driver board and the main controller via the optical interface, ensuring reliable transmission of PWM logic and fault signals. Following this, a double pulse test was conducted on the full-bridge submodule up to 550 V and 30 A till now. The test results validated the switching performance of the MOSFET’s used.